Re: [sv-cc] RE: [sv-bc] ref can be used as formal argument of exported task/function?

Hi Brad,

Yes, I am satisfied with the clarification what I get.

Thanks,
Dhiraj

Brad Pierce wrote:

> Jim,
>
>    If Doug thinks the LRM is clear enough as is, that's good enough 
> for me.
>
> Dhiraj,
>
>     Are you satisfied with this clarification of your question?  The 
> LRM already says of exported functions --  "However, such functions 
> must adhere to the same restrictions on argument types and results as 
> imposed on imported functions."
>
> -- Brad
>
>
> -----Original Message-----
> From: Jim Vellenga [mailto:vellenga@cadence.com]
> Sent: Wednesday, January 16, 2008 8:07 AM
> To: Warmke, Doug; Brad Pierce; sv-cc@eda.org
> Cc: sv-bc@eda.org
> Subject: RE: [sv-cc] RE: [sv-bc] ref can be used as formal argument of 
> exported task/function?
>
> Brad should decide if he wants to file a Mantis item for a 
> clarification -- or is this a formal request from the SV-BC?
>
> Regards,
> Jim
>
> ---------------------------------------------------------
> James H. Vellenga                            978-262-6381
> Software Architect                     (FAX) 978-262-6636
> Cadence Design Systems, Inc.         vellenga@cadence.com
> 270 Billerica Rd
> Chelmsford, MA 01824-4179
> "We all work with partial information."
> ---------------------------------------------------------- 
>
> ]-----Original Message-----
> ]From: owner-sv-cc@eda.org [mailto:owner-sv-cc@eda.org] On ]Behalf Of 
> Warmke, Doug
> ]Sent: Monday, January 14, 2008 12:07 PM
> ]To: Brad Pierce; sv-cc@eda.org
> ]Cc: sv-bc@eda.org
> ]Subject: [sv-cc] RE: [sv-bc] ref can be used as formal ]argument of 
> exported task/function?
> ]
> ]Yes, the restriction applies to exports as well.
> ]The fundamental concept is the same:  The data representations ]in 
> the two languages must be allowed to differ.  Thus one can't ]have a 
> "ref" in one language refer to the other language's ]data representation.
> ]
> ]Regards,
> ]Doug
> ]
> ]-----Original Message-----
> ]From: owner-sv-bc@server.eda.org
> ][mailto:owner-sv-bc@server.eda.org] On Behalf Of Brad Pierce
> ]Sent: Monday, January 14, 2008 8:10 AM
> ]To: sv-cc@server.eda.org
> ]Cc: sv-bc@server.eda.org
> ]Subject: RE: [sv-bc] ref can be used as formal argument of ]exported 
> task/function?
> ]
> ]SV-CC,
> ]
> ]In http://www.eda-stds.org/sv-bc/hm/7860.html , Dhiraj points out that
> ]34.5.4 makes the following restriction
> ]
> ]    "The qualifier ref cannot be used in import declarations."
> ]
> ]and asks whether an analogous restriction applies to export 
> ]declarations.  See his example below.
> ]
> ]Could you please clarify?
> ]
> ]According to 34.7
> ]
> ]    "However, such functions must adhere to the same restrictions on
> ]argument types and results as imposed on imported functions. It is an 
> ]error to export a function that does not satisfy such constraints."
> ]
> ]and
> ]
> ]   "Class member functions cannot be exported, but all other
> ]SystemVerilog functions can be exported."
> ]
> ]According to 34.8
> ]
> ]   "All aspects of exported functions described above in 34.7 apply to
> ]exported tasks."
> ]
> ]Thank you,
> ]
> ]-- Brad
> ]
> ]-----Original Message-----
> ]From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of 
> ]Dhiraj Kumar Prasad
> ]Sent: Monday, January 14, 2008 6:31 AM
> ]To: sv-bc@eda.org
> ]Cc: Dhiraj Kumar Prasad
> ]Subject: [sv-bc] ref can be used as formal argument of exported 
> ]task/function?
> ]
> ]Hi,
> ]
> ]Is the following testcase is valid?
> ]
> ]module tmp();
> ]
> ]export "DPI-C" function  func1;
> ]
> ]function automatic func1(ref in1,output byte out1); begin ] out1 = 
> in1; ]end ]endfunction ] ]endmodule ] ]In LRM P1800-2005,Nothing is 
> said about the use of ref data type in the ]formal argument of 
> exported task/function although the restriction on ]imported 
> task/function is given in section 26.4.4.
> ]
> ]Thanks,
> ]Dhiraj
> ]
> ]
> ]
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