But you have different keywords: "assert" and "assert property". Regards, Dmitry ________________________________ From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] On Behalf Of Adam Krolnik Sent: Monday, October 29, 2007 5:56 PM To: Seligman, Erik Cc: sv-ac@server.eda.org; sv-bc@server.eda-stds.org Subject: [sv-ac] Re: [sv-bc] 2005: Deferred assertions (new proposal at http://www.verilog.org/mantis/view.php?id=2005) Hello all; My concern with this new syntax is that you are now very close to concurrent assertions. Deferred: assert (#0 | event_expr) ... Concurrent assert property ... If you keep the ability for an event expression, then you have two seemingly same syntax constructions. This may cause confusion to users. SV-AC what do you think about this confusion between deferred and concurrent forms ? -- Soli Deo Gloria Adam Krolnik Director of Design Verification VeriSilicon Inc. Plano TX. 75074 Co-author "Assertion-Based Design", "Creating Assertion-Based IP" -- This message has been scanned for viruses and dangerous content by MailScanner <http://www.mailscanner.info/> , and is believed to be clean. --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Mon Oct 29 09:33:02 2007
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