Re: [sv-bc] XMRs in parameter value overrides of module instantiations

From: Geoffrey.Coram <geoffrey.coram_at_.....>
Date: Mon Oct 01 2007 - 05:22:38 PDT
Mark Hartoog wrote:
>> -----Original Message-----
>> From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On 
>> Behalf Of Geoffrey.Coram
>>
>> The Verilog-AMS committee has had some thoughts about having 
>> a "process constants" module that would contain, eg, TOX for 
>> both PMOS and NMOS, and the MOS modules would then use a 
>> hierarchical reference to obtain TOX, which would then allow 
>> it to be modified in one place to model process variation.
> 
> Can you use a package instead of module to hold the process constants?
> Packages can be easily referenced from all over the design.

Packages aren't in Verilog-AMS, but I expect they will be in
SystemVerilog-AMS, whenever that standard is developed.

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Received on Mon Oct 1 05:23:02 2007

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