Cliff wrote: >There is ample evidence to show that we intended configs to be part of the >Verilog input stream. Based on this information, to argue that configs >could not be in the same file or read in the same input stream is a real >stretch. Oh, I don't dispute that this seems to have been the intent. However, apparently the IEEE rules require that official interpretations be made based only on what is written in the standard, and not by the intention. And here we have the formal BNF, versus some English text that can be interpreted in ways that don't contradict it. I think this warrants my statement about what the standard "technically" says. I think it is important to recognize that this is a likely outcome of an official interpretation of the standard. I don't think we want to go through such a process. I also don't think that this is the most important factor in deciding what the next revision of the LRM should say. >We are four years into the 1364-2001 Standard. Another implementation has >agreed with my interpretation for the past two years. The fact that >NC-Verilog has already implemented most of Verilog-2001 but is just now >completing configs has caused the above predicament. It is regrettable but >it was a business decision on the part of Cadence. I filed this issue with 1364 a full 6 months before this other implementation appeared. I filed the first issue with library mapping keywords 9 months before that. None of these issues has been resolved, nor would an earlier implementation on our part have made the keyword conflicts go away. We would have used the same solution to avoid them, and been in the same situation today. While you may not approve of our implementation schedule, it hasn't caused the current situation. Steven Sharp sharp@cadence.comReceived on Mon Apr 25 22:01:30 2005
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