RE: [sv-bc] Errata: variable initializers don't match Verilog-2001

From: Mark Hartoog <Mark.Hartoog@synopsys.com>
Date: Thu Dec 09 2004 - 13:28:13 PST

I think the issue here is that initial blocks execute in an arbitrary
order. There is no guarantee that all initial values will be set before
an initial block starts. For code like:

int x = 123;
int y;
initial y = x * 2;

We can not be sure that 'x' will be initialized before the user written
initial blocks starts. Now a "reasonable" verilog simulator probably
would always do this correctly, but it is less clear whether this is
true between different modules or program blocks.

I think the requirement is that all initial values must be assigned
throughout the design before any user initial blocks starts.

By the way, with the addition of 2 state variables, you have this problem
even without initial values. Consider:

int x;
logic [31:0] y;
logic [31:0] z;

always @(x) y = x;
always_combo z = x;

The always_comb block gets executed at time 0, so 'z' would be zero,
but the regular always block does not, so 'y' will be unknown.

Do you want the initial values of 2 state variables to also generate
events?

> -----Original Message-----
> From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org]On Behalf Of
> Steven Sharp
> Sent: Thursday, December 09, 2004 12:46 PM
> To: Dave_Rich@mentorg.com; Shalom.Bresticker@freescale.com
> Cc: sv-bc@eda.org
> Subject: RE: [sv-bc] Errata: variable initializers don't match
> Verilog-2001
>
>
> >From: Shalom.Bresticker@freescale.com
> >
> >Dave,
> >
> >> I believe the testbench section of SV depends on the currently defined
> >> behavior,
> >
> >Can you be more specific?
>
> Since Dave has not replied...
>
> I asked the same thing at the SV-BC meeting. I pointed out that
> testbenches get written in Verilog also, and asked what features
> specific to SystemVerilog depend on this.
>
> Dave mentioned program blocks. I said that I thought program blocks
> executed in the reactive region, so variables would already have been
> initialized before the program blocks execute, even with the 1364
> rules. Dave expressed concern that initializers in program blocks
> would also execute in the reactive region, preventing this. I said
> that I didn't see any reason why initializers in program blocks
> couldn't be defined to execute at the same time as initializers in
> modules, and not in the reactive region. There was no further
> discussion.
>
> I think the real answer is that this was speculation on Dave's part.
> It is possible that there is an issue here, but no evidence of it has
> been presented.
>
> Steven Sharp
> sharp@cadence.com
Received on Thu Dec 9 13:26:32 2004

This archive was generated by hypermail 2.1.8 : Thu Dec 09 2004 - 13:26:36 PST