Re: [sv-bc] Re: Errata: inconsistent time literal rules

From: <Shalom.Bresticker@freescale.com>
Date: Thu Nov 04 2004 - 01:25:14 PST

Personally, I think time units and timescales are amongst the worst
features in Verilog (much more troublesome in practice than defparams,
for example ...).

I'm sorry that SV took the route of extending them.

Shalom

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Received on Thu Nov 4 01:25:26 2004

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