Re: [sv-bc] Errata: variable initializers don't match Verilog-2001

If the SV needs to state that always_comb executes once at time 0, then I would
think it would need to say so for all other similar constructs, such as
continuous assignments, port connections, and primitive evaluations.

Side note: I think the problem with discussing "backward compatibility" is the
definition of the phrase. There is more than one interpretation of what the
phrase means. It might be better to be less obsessed with this buzzword and
concentrate on the facts, which are more agreed to than whether the behavior
meets the definition of this phrase or not.

Shalom

--
Shalom Bresticker                        Shalom.Bresticker @freescale.com
Design & Reuse Methodology                           Tel: +972 9  9522268
Freescale Semiconductor Israel, Ltd.                 Fax: +972 9  9522890
POB 2208, Herzlia 46120, ISRAEL                     Cell: +972 50 5441478
[ ]Freescale Internal Use Only      [ ]Freescale Confidential Proprietary