Subject: [sv-bc] Proposal for SV-BC-95
From: Dave Rich (David.Rich@synopsys.com)
Date: Sun Nov 16 2003 - 23:38:55 PST
interface ebus_i;
integer I; // reference to I not allowed through modport mp
typedef enum {Y,N} choice;
choice Q;
parameter True = 1;
modport mp(input Q);
endinterface
module Top;
ebus_i ebus;
sub s1(ebus.mod);
endmodule
module sub(interface.mp i);
typedef i.choice yes_no; // import type from interface
yes_no P;
assign P = i.Q; // refer to Q with a port reference
initial
Top.s1.Q = True; // refer to Q with a hierarchical reference
initial
Top.s1.I = 0; // refering to i.I would not be legal because is not in modport mp
endmodule
-- David.Rich@Synopsys.com Technical Marketing Consultant http://www.SystemVerilog.org tele: 650-584-4026 cell: 510-589-2625
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