Re: [sv-ec] FW: [sv-bc] keywords as identifiers


Subject: Re: [sv-ec] FW: [sv-bc] keywords as identifiers
From: David W. Smith (David.Smith@synopsys.com)
Date: Sun Nov 16 2003 - 23:09:04 PST


ERR-47 has been opened on this.

Regards
David

----- Original Message -----
From: "Arturo Salz" <Arturo.Salz@Synopsys.COM>
To: <sv-ec@eda.org>
Cc: "sv bc" <sv-bc@eda.org>
Sent: Saturday, November 15, 2003 12:05 PM
Subject: Re: [sv-ec] FW: [sv-bc] keywords as identifiers

> That is a BNF error.
>
> We'll open an errata and fix it.
>
> Arturo
>
> ----- Original Message -----
> From: <Vassilios.Gerousis@infineon.com>
> To: <sv-ec@eda.org>
> Sent: Saturday, November 15, 2003 9:07 AM
> Subject: [sv-ec] FW: [sv-bc] keywords as identifiers
>
>
> FYI
>
> -----Original Message-----
> From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of
> Ilmberger Hermann (CL DAT TDM VM)
> Sent: Thursday, November 13, 2003 3:39 PM
> To: Subject: [sv-bc] keywords as identifiers
>
>
> SystemVerilog at some places allows keywords to be used as identifier:
> function new(); this.x = 23; super.new(5);
>
> Nothing is defined in the grammar whether "new" is allowed here.
>
> implicit_class_handle ::= [ this. ] | [ super. ]
> starts to define the places, where "this" and "super" are allowed.
>
> The following is the only rule that uses implicit_class_handle:
>
> primary ::=
> ...
> | implicit_class_handle hierarchical_identifier { [ expression ] } [ [
> range_expression ] ] [ . method_identifier { attribute_instance } [ (
> expression { , expression } ) ] ]
>
> However, it seems that this does not cover things like: this.super.x
> this.method(23)
> this.x = 23;
>
> So "this", "super" and "new" are intended to be used at more places than
the
> grammar allows. What should we do here?
>
> -Hermann
>
>



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