RE: [sv-bc] modport expression

I would say that the sentence means,

"A modport expression is a way to allow such items as elements of arrays and structures, etc., to be included in a modport list, that would otherwise not be allowed to appear."

That is, the intent is,

"  - all kinds of expression on inputs and LHS expresion for other direction"

And about

"    input  .p1(i+j),"

the LRM says,

"The port expression shall resolve to a legal expression for type of module port (see 23.3.3). In the example above, the Q port could not be an output or inout because the port expression is a constant."

Regards,
Shalom


From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Daniel Mlynek
Sent: Wednesday, November 21, 2012 13:44
To: sv-bc@eda.org
Subject: [sv-bc] modport expression

LRM says:
"A modport expression allows elements of arrays and structures, concatenations of elements, and assignment pattern expressions of elements declared in an interface to be includedin a modport list. This modport expression is explicitly named with a port identifier, visible only through the modport connection"

On the other handLRM explicitly do not forbid other kinds of expression and  in BNF you can find:
modport_simple_port ::=
   port_identifier
   | .port_identifier ([ expression ] )

My question is what is the LRM intention  - what should be allowed in modport expression:
  - all kinds of expression on inputs and LHS expresion for other direction
  - expression listed in 1st quotation above - item select, member select, concatenation and APE for all directions (input, output, ref , inout)

For input modport having expression not allowed on LHS of assignment can somehow work:
interface  iface;
  int i,j;
  modport mpi (
    input  .p1(i+j),
  );
endinterface




DANiel

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