[sv-bc] RE: [sv-ec] $readmem proposal discussion


Subject: [sv-bc] RE: [sv-ec] $readmem proposal discussion
From: Warmke, Doug (doug_warmke@mentorg.com)
Date: Fri Sep 12 2003 - 21:52:39 PDT


Shalom,

Thanks for pointing this out and saving all of us time.
For those interested, here is a link to errata/87:

   http://boydtechinc.com/etf/archive/etf_2003/0913.html

BTW, for those who don't have time to look, this erratum
is primarily concerned with the problem I mentioned in the
directionality of data loading by $readmemh/b.
(Not multi-D memories)

Regards,
Doug

> -----Original Message-----
> From: Shalom.Bresticker@motorola.com
> [mailto:Shalom.Bresticker@motorola.com]
> Sent: Friday, September 12, 2003 4:28 AM
> To: Warmke, Doug
> Cc: sv-bc@eda.org; sv-ec@eda.org
> Subject: Re: [sv-ec] $readmem proposal discussion
>
>
> Doug,
>
> This erratum was discovered long ago by IEEE 1364,
> and is in 1364 ETF database as errata/87.
>
> It is supposed to be noted in an errata sheet to be added
> to a new printing of 1364-2001 which is supposed to be ready
> in the near future.
>
> Shalom
>
>
> > One issue has come up since we originally created
> > our proposal. Namely, 1364-2001 says that for
> > data files that don't contain addresses, the memory
> > is loaded in the order of its declaration range.
> > So memory dimensions declared [high:low] should have
> > the first words in the file go into the highest addresses,
> > and on down to the lower addresses as the file words go up.
> > Opposite for [low:high].
> >
> > However, to my knowledge, not a single Verilog simulator
> > actually works this way. They all load the first words
> > in the file into the lowest memory addresses, and continue
> > upwards. This occurs regardless of the low:high/high:low
> > range given in the dimension's declaration. Should we change
> > the LRM to conform with this de facto behavior? This would
> > be a good opportunity to do so, although it might be argued
> > that we should leave this to the IEEE. Well, maybe we could
> > just do it here, or make a note of it in our LRM, and leave
> > it to them to sort out later.
>
> --
> Shalom Bresticker
> Shalom.Bresticker@motorola.com
> Design & Reuse Methodology Tel:
> +972 9 9522268
> Motorola Semiconductor Israel, Ltd. Fax:
> +972 9 9522890
> POB 2208, Herzlia 46120, ISRAEL Cell:
> +972 50 441478
>



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