RE: [sv-bc] Question on memory pattern file formats in SV


Subject: RE: [sv-bc] Question on memory pattern file formats in SV
From: Warmke, Doug (doug_warmke@mentorg.com)
Date: Wed Aug 20 2003 - 17:52:36 PDT


Steve,

Thanks for the quick answer.
A couple of things to consider:

1) Performance will be better with all memory file I/O
   handled by $readmem and $writemem.

2) In case a simulator implements a sparse
   memory concept, user-created for loops
   may be quite difficult to implement correctly.
   Smart $readmem/$writemem could handle the
   sparse architecture, however.

Regards,
Doug

> -----Original Message-----
> From: Steven Sharp [mailto:sharp@cadence.com]
> Sent: Wednesday, August 20, 2003 5:46 PM
> To: sv-ec@eda.org; sv-bc@eda.org; Warmke, Doug
> Subject: Re: [sv-bc] Question on memory pattern file formats in SV
>
>
> My opinion of the Verilog-2001 issues are as follows:
>
> The $readmem system tasks do not support multi-dimensional
> arrays, and I
> don't think there is any need to extend them to do so.
> Verilog-2001 added
> more general file reading capability, such as $fscanf. This
> can be used to
> implement any kind of multi-dimensional array reading
> functionality that
> the user wants. Assuming no need for embedded addresses in
> the file, such
> code is trivial to write.
>
> The $writemem system tasks have never provided any necessary
> capabilities,
> since the same thing can be done with a Verilog for-loop
> around a $fdisplay.
>
> Steven Sharp
> sharp@cadence.com
>



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