Re: [sv-ac] Re: [sv-ec] Re: [sv-bc] RE: Review of BNF and Keywords by Dan Jacobi


Subject: Re: [sv-ac] Re: [sv-ec] Re: [sv-bc] RE: Review of BNF and Keywords by Dan Jacobi
From: Dave Rich (David.Rich@synopsys.com)
Date: Fri Apr 11 2003 - 11:38:09 PDT


I agree with that too.

Jay Lawrence wrote:

>"Remembering" to add this would also involve "remembering" to update all
>the inference rules to deal with infering clocks and conditions from
>called functions.
>
>Jay
>
>
>===================================
>Jay Lawrence
>Senior Architect
>Functional Verification
>Cadence Design Systems, Inc.
>(978) 262-6294
>lawrence@cadence.com
>===================================
>
>
>
>>-----Original Message-----
>>From: Dave Rich [mailto:David.Rich@synopsys.com]
>>Sent: Friday, April 11, 2003 2:07 PM
>>To: David W. Smith
>>Cc: 'Adam Krolnik'; sv-ec@eda.org; sv-ac@eda.org; 'Stefen Boyd'
>>Subject: Re: [sv-ac] Re: [sv-ec] Re: [sv-bc] RE: Review of
>>BNF and Keywords by Dan Jacobi
>>
>>
>>It may just be a simple case of someone 'forgetting' to put the
>>concurrent_assert_statement in as part of the function_statement
>>production. This is an example of what happens when people try to put
>>all of the semantics in the BNF. Feature additions require change in
>>multiple places.
>>
>>I can see both sides of this argument, but people should keep this
>>problem in mind when they try to split up the BNF, especially in a
>>language that is under development.
>>
>>Dave
>>
>>
>>David W. Smith wrote:
>>
>>
>>
>>>Hi Adam,
>>>This is really a question for the AC committee on whether the want to
>>>support this. At this point there has been no support for concurrent
>>>assertions in the final block and it is far too late to
>>>
>>>
>>consider it for 3.1.
>>
>>
>>>Sounds like an issue to be considered during the next rev of
>>>
>>>
>>SystemVerilog.
>>
>>
>>>Regards
>>>David
>>>
>>>David W. Smith
>>>Synopsys Scientist
>>>
>>>Synopsys, Inc.
>>>Synopsys Technology Park
>>>2025 NW Cornelius Pass Road
>>>Hillsboro, OR 97124
>>>
>>>Voice: 503.547.6467
>>>Main: 503.547.6000
>>>FAX: 503.547.6906
>>>Email: david.smith@synopsys.com
>>>http://www.synopsys.com
>>>
>>>
>>>
>>>-----Original Message-----
>>>From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On
>>>
>>>
>>Behalf Of Adam
>>
>>
>>>Krolnik
>>>Sent: Friday, April 11, 2003 7:47 AM
>>>To: Dave Rich
>>>Cc: David W. Smith; sv-ec@eda.org; sv-ac@eda.org; 'Stefen Boyd'
>>>Subject: [sv-ac] Re: [sv-ec] Re: [sv-bc] RE: Review of BNF
>>>
>>>
>>and Keywords by
>>
>>
>>>Dan Jacobi
>>>
>>>
>>>
>>>
>>>
>>>Good morning Dave;
>>>
>>>
>>>Is it possible to have concurrent_assert_statments in final blocks?
>>>
>>>I.e. function_statement does not allow it - although I would
>>>
>>>
>>really like to
>>
>>
>>>allow concurrent_assert_statements into both functions and
>>>
>>>
>>final blocks.
>>
>>
>>> Adam Krolnik
>>> Verification Mgr.
>>> LSI Logic Corp.
>>> Plano TX. 75074
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>--
>>--
>>Dave Rich
>>Principal Engineer, CAE, VTG
>>Tel: 650-584-4026
>>Cell: 510-589-2625
>>DaveR@Synopsys.com
>>
>>
>>
>>
>>
>
>
>
>

-- 
--
Dave Rich
Principal Engineer, CAE, VTG
Tel:  650-584-4026
Cell: 510-589-2625
DaveR@Synopsys.com



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