[sv-bc] RE: LRM Draft 4 issues


Subject: [sv-bc] RE: LRM Draft 4 issues
From: David W. Smith (david.smith@synopsys.com)
Date: Wed Apr 09 2003 - 11:11:32 PDT


Dave,
I have done something with each of these except LRM-26. There is
insufficient information for me to do anything. Please provide.

Also, please check the changes for the other items (later today when they
are on the site). It was not always clear what was required.

This leaves the following issues for BC to resolve:

LRM-15: The issue came up in EC about whether order was meant to be
important for forms such as "int static" vs. "static int". The class
definition work was done with the Superlog assumption that the order was not
important. Unfortunately this was never done in the BNF. BC either needs to
confirm this or we need to put on an issue for the next release.

LRM-26, LRM-46, LRM-48 through LRM-61

Many of these are BNF issues that will have to be provided in explicit fixes
by BC.

Good luck. Two days left!

Regards
David

-----Original Message-----
From: Dave Rich [mailto:David.Rich@Synopsys.COM]
Sent: Monday, April 07, 2003 10:44 AM
To: David W. Smith; sv-bc@eda.org
Subject: LRM Draft 4 issues

LRM-2 LRM-3

I don't see the confusion here. "formals" are created in the definition
of a body, "actuals" are what is used in the reference of that body. So
actual parameters are what is used when instantiating a module. For example

module foo
(input bit A); // formal port A
parameter B=2; // formal parameter B
task C
(input bit D); // formal argument D
endtask
endmodule

module top;
bit X;
foo
#(3) // actual parameter 3 for formal B
I (X); // actual port X for formal A
initial I.C
(X+1); // actual argument X+1 for formal D
endmodule

DWS: No change.

LRM-4 LRM-9

DWS: LRM-4: It appears that BC65 was actually use for LRM-4. Fix provided
for LRM-9.

BC65 superseded BC62a. Should have used BC65

See http://www.eda.org/sv-bc/hm/0592.html for an explanation

LRM-5
7.13 is correct
DWS: No change.

LRM-6
3.4.1 was from the SV3.0
This is now just section 3.4 in draft4
See http://www.eda.org/sv-bc/hm/0422.html for an explanation

DWS: In the reference you gave it indicated that time was to be moved from a
non_integer_type to an integer_atom_type. This was not done. I Syntax 3-1
correct? I have indicated that Section 3.4 will be deleted.

LRM-25

Suggest globally replacing .name with .port_identifier in italics.

DWS: Done

LRM-26

This was supposed to be in a proposal for SV21-1, which got pushed to
SV3.2. We are going to have to replace that with something else. See
http://www.eda.org/sv-bc/hm/0580.html for an explanation.

DWS: So, what am to do with this?

-- 
--
Dave Rich
Principal Engineer, CAE, VTG
Tel:  650-584-4026
Cell: 510-589-2625
DaveR@Synopsys.com



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