Subject: RE: [sv-bc] Re: Proposed BNF replacement for A.2.9 (modports)
From: Jacobi, Dan (dan.jacobi@intel.com)
Date: Wed Jan 29 2003 - 08:02:36 PST
Brad,
Sorry for the late response
Two questions
The first question looks like an errata from the original System-Verilog BNF
The following BNF Rules :
modport_tf_port
::=
'task' named_task_proto
| 'function' named_function_proto
| task_or_function_identifier
named_task_proto ::= 'task' task_identifier '(' task_proto_formal {
',' task_proto_formal } ')'
named_function_proto::= 'function' data_type function_identifier '('
list_of_function_proto_formals ')'
will actually cause the replication of the key words task and function such
as
modport mod1 (export function functionbar1(a,b,c));
modport mod2 (import task task bar2(a,b,c));
The second question :
the following RTL is supported by you proposal
task aTask .... // this is a task declaration
endtask
function aFunc ....// this is a function declaration
endfunction
modport mod1 (export function functionbar1(a,b,c),aTask); // aTask
is a task
modport mod2 (import task task bar2(a,b,c),aFunc); // aFunc is a
function
The problem is the function identifier aFunc appears after the task
prototype.
Maybe the following changes are less confusing
replace A.2.9 with --
modport_declaration
::=
'modport' modport_item { ',' modport_item } ';'
modport_item
::=
modport_identifier '(' modport_ports_declaration
{ ',' modport_ports_declaration } ')'
modport_ports_declaration
::=
modport_simple_ports_declaration
| modport_hierarchical_ports_declaration
| modport_tf_ports_declaration
modport_simple_ports_declaration
::=
'input' list_of_modport_port_identifiers
| 'output' list_of_modport_port_identifiers
| 'inout' list_of_modport_port_identifiers
modport_hierarchical_ports_declaration
::=
interface_instance_identifier
[ '[' constant_expression ']' ]
. modport_identifier
modport_tf_ports_declaration
::=
import_export modport_tf_port
modport_tf_port
::=
named_task_proto { ',' named_task_proto }
| named_function_proto { ',' named_function_proto }
| task_or_function_identifier { ',' task_or_function_identifier
}
import_export
::=
'import'
| 'export'
Thanks
>-----Original Message-----
>From: Brad Pierce [mailto:Brad.Pierce@synopsys.com]
>Sent: Thursday, January 23, 2003 4:12 AM
>To: sv-bc@eda.org
>Subject: [sv-bc] Re: Proposed BNF replacement for A.2.9 (modports)
>
>
>Amended modport_hierarchical_ports_declaration production --
>
->----------------- Proposal ----------------------------------------
>
>Replace A.2.9 with --
>
> modport_declaration
> ::=
> 'modport' modport_item { ',' modport_item } ';'
>
> modport_item
> ::=
> modport_identifier '(' modport_ports_declaration
> { ',' modport_ports_declaration } ')'
>
> modport_ports_declaration
> ::=
> modport_simple_ports_declaration
> | modport_hierarchical_ports_declaration
> | modport_tf_ports_declaration
>
> modport_simple_ports_declaration
> ::=
> 'input' list_of_modport_port_identifiers
> | 'output' list_of_modport_port_identifiers
> | 'inout' list_of_modport_port_identifiers
>
> modport_hierarchical_ports_declaration
> ::=
> interface_instance_identifier
> [ '[' constant_expression ']' ]
> . modport_identifier
>
> modport_tf_ports_declaration
> ::=
> import_export modport_tf_port
> { ',' modport_tf_port }
>
> modport_tf_port
> ::=
> 'task' named_task_proto
> | 'function' named_function_proto
> | task_or_function_identifier
>
> import_export
> ::=
> 'import'
> | 'export'
>
>-------
>
>Add to A.9.3 --
>
> interface_instance_identifier
> ::=
> identifier
>-------
>
>Add to A.2.3 --
>
> list_of_modport_port_identifiers
> ::=
> port_identifier { ',' port_identifier }
>
>-------------- Motivations ----------------------------------
>
> 1) In an hierarchical interface, modport ports can
> themselves be from modports of interface instances.
> And those instances can be arrayed or generated,
> just like module instances. So rather than
>
> interface_identifier . port_identifer
>
> we need
>
> interface_instance_identifier {[...]}
> . modport_identifier
>
> 2) The current BNF uses an ANSI-C style in modports that
> would require repetitive declarations of direction and
> import/export, such as,
>
> modport master ( input a,
> input b,
> output c,
> output d,
> import task masterRead(),
> import task masterWrite() ) ;
>
> but the SystemVerilog language uses a style consistent
> with Verilog 2001, extending the ANSI-C style to
> something like --
>
> modport master ( input a, b,
> output c, d,
> import task masterRead(),
> task masterWrite() ) ;
>
> 3) As noted in http://www.eda.org/sv-bc/hm/0221.html
> the [port_type] should not have been in modport_port
> in the existing BNF.
>-----------------------------------------------------------------
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