Additional attributes: ====================== 1. (* synthesis, combinational [=] *) This attribute can be applied to an always block or to a module (in this case, it applies to all always blocks in that module). Indicates that the logic generated from the always block shall be combinational. It shall be an error if it is not so. 2. (* synthesis, implementation = *) Applies to an operator. The "value" is not defined by the standard. Examples of "value" are "cla" for +, "wallace" for *. 3. (* synthesis, sync_set_reset = "signal_name1, signal_name2, ..." *) Applies to an always block that infers edge sensitive storage devices. If no edge sensitive storage device is inferred in the block, a warning is issued. The presence of the attribute causes the set/reset logic to be applied directly to the set/reset pins of a flip-flop if such a flip-flop is available in the library. (Definitions: Set logic - the logic that sets the output of flip-flop to 1, reset logic - the logic that sets the output of flip-flop to 0). When no signal names are present, both set and reset logic signals are applied directly to the set/reset pins of a flip-flop. When signal names are present, only the specified signals are connected to the set/reset pins (others are connected through the data input of the flip-flop. 4. (* synthesis, async_set_reset = "signal_name1, signal_name2, ..." *) Applies to an always block that infers level-sensitive storage devices. If no level-sensitive storage devices are inferred for the block, a warning shall be issued. Same as last 4 bullets of previous attribute. 5. (* synthesis, black_box [=] *) Applies to a module instance or to a module (in which case it applies to all its module instances). Only the module's interface shall be defined for synthesis. The module itself may be empty or may contain non-synthesizable statements. It may also refer to an external implementation, for eg. in an EDIF file. Such a black box cannot be optimized during synthesis. 6. (* synthesis, keep[=] *) Applies to a net or a module instance or to a module (in which case it applies to all its instances). With the presence of this attribute, the instance is preserved (not deleted) even if the outputs of the module are not used anywhere. Similarly a net with such an attribute is preserved. 7. (* synthesis, ff_preserve [=] *) Applies to a reg or to a module (in which case it applies to all regs in that module). Presence of the attribute causes no optimizations to occur across (the specified reg) flip-flop boundaries. 8. (* synthesis, op_sharing [=] *) Applies to a module. Presence of attribute enables operator sharing in that module (and all its instances).