[sv-ec] rand_mode and array size randomization

From: Daniel Mlynek <danielm@aldec.com.pl>
Date: Thu Mar 19 2015 - 03:52:54 PDT

IMHO another case which can clear LRM ambiguity based on SV user complain:
http://www.verilog.org/mantis/view.php?id=5245


DANiel

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Received on Thu Mar 19 03:54:10 2015

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