[sv-ec] Casting references of Interface Classes

Also up for discussion/clarification today. -Tom

8.25.3 Casting and Object reference assignment

There are a handful of relationships that must be clearly defined in order for interface classes to work properly with SystemVerilog. In order to maintain the OOP and polymorphism semantics, it shall be legal to assign an interface class handle to a child object that implements it.

    PutImp #() put_ref;
    Fifo#() fifo_obj = new;
    put_ref = fifo_obj;

It shall also be possible to have multiple references of an interface class and use them to cast from one to other.

     PutImp #() put_ref;
    GetImp #() get_ref;
    Fifo#() fifo_obj = new;
    put_ref = fifo_obj;
    get_ref = put_ref;

What about the Fifo implementing two interface types. Can you have two references of the interface class and cast it from one to the other? We think, yes. Give an example of put_ref and get_ref that does this assignment. Both have to be fully implemented (but this would compile fail when the class did not implement)

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