RE: [sv-ec] $random(), $urandom()

Hi Cliff,

The key difference between $random and $unrandom is the internal state
of the RNG. 

With $random, the seed is the RNG 32-bit state. And there is only one
RNG for the entire simulation. And the only way to get at the state of
the RNG is by using the inout argument of $random(seed). This allows you
to code do-it-yourself random stability. The fact that some
implementations accept either a variable or an expression is a quick of
the PLI nature of system functions, which allow you to programmatically
change the nature of each argument.

In SV, the RNG is typically used to generate random numbers greater than
32-bits, so the internal RNG state is much greater than 32-bits, and is
implementation specific. The 32-bit seed is used to set the RNG initial
state, but there are many other RNG states not represented by a specific
seed. So there is no need for "next-seed" value when you call $urandom.
As Ray mentioned, you can use get/set randstate to manage the internal
RNG state.

Dave

> -----Original Message-----
> From: owner-sv-ec@server.eda.org [mailto:owner-sv-ec@server.eda.org]
On
> Behalf Of Cliff Cummings
> Sent: Thursday, June 11, 2009 10:09 AM
> To: sv-ec@server.eda.org
> Subject: [sv-ec] $random(), $urandom()
> 
> Thanks, Shalom -
> 
> I have run into issues with empty parentheses in the past with one
> implementation, but not with the two implementations that I tested
yesterday.
> 
> I am not as certain about the integral number -vs- integral variable
issue.
> 
> I did find text supporting your position in the third paragraph of
> clause 20.15.1 (ballot draft):
> The seed argument shall be an integral variable. The seed value
> should be assigned to this variable prior to calling $random.
> But I wonder if that is a mistake. Do you have access to any tools
> that do not support integral numbers inside of the parentheses? Seems
> like if one uses $random(integral_number), one would always get the
> same value returned, which is what I observed. Adding the integral
> variable allows $random to change the seed between calls.
> 
> Regarding $urandom(integral_number), from the second paragraph of
> 18.13.1 (ballot draft):
> The seed is an optional argument that determines the sequence of
> random numbers generated. The seed can be any integral expression.
> The random number generator (RNG) shall generate the same sequence of
> random numbers every time the same seed is used.
> And the subsequent example shows: addr[32:1] = $urandom(254);
> 
> Comments?
> 
> Regards - Cliff
> 
> 
> At 07:01 AM 6/11/2009, Bresticker, Shalom wrote:
> >Cliff,
> >
> >You got lucky with respect to the syntax.
> >The BNF does not allow empty parentheses to either $random or
> >$urandom, and for $random, the seed has to be an integral variable
> >and may not be a constant.
> >Some tools will not compile those cases.
> >
> >Regards,
> >Shalom
> >
> > > -----Original Message-----
> > > From: owner-sv-ec@server.eda.org
> > > [mailto:owner-sv-ec@server.eda.org] On Behalf Of Clifford E.
Cummings
> > > Sent: Thursday, June 11, 2009 2:32 AM
> > > To: sv-ec@server.eda.org
> > > Subject: [sv-ec] Question about seeding $urandom
> > >
> > > Hi, All -
> > >
> > > I think random falls under EC, so at the bottom is the question.
> > >
> > > I was playing with $urandom and trying to seed it, and have run
into
> > > problems related to my understanding of seeding this function.
> > >
> > > The following code is also in an attached file: urandomtest.sv
> > > (I run the nine different iterations using +define+RUN1 thru
> > > +define+RUN9)
> > >
> > > program urandomtest;
> > >    logic [7:0] a;
> > >    int         seed;
> > >
> > >    initial $monitor("a=%h", a);
> > >
> > >    initial begin
> > >      `ifdef RUN1
> > >      repeat(20) #1 a = $random();
> > >      `elsif RUN2
> > >      repeat(20) #1 a = $random(145);
> > >      `elsif RUN3
> > >      seed = 145;
> > >      repeat(20) #1 a = $random(seed);
> > >      `elsif RUN4
> > >      repeat(20) #1 a = $urandom();
> > >      `elsif RUN5
> > >      repeat(20) #1 a = $urandom(145);
> > >      `elsif RUN6
> > >      seed = 145;
> > >      repeat(20) #1 a = $urandom(seed);
> > >      `elsif RUN7
> > >      repeat(20) #1 a = $urandom_range(145);
> > >      `elsif RUN8
> > >      repeat(20) #1 a = $urandom_range(100,145);
> > >      `elsif RUN9
> > >      seed = 145;
> > >      repeat(20) #1 a = $urandom_range(seed);
> > >      `endif
> > >    end
> > > endprogram
> > >
> > > $random - normal Verilog behavior
> > > RUN1 - $random() generates 20 random numbers
> > >
> > > RUN2 - generates the same random number 20 times, each time using
the
> > > seed value of 145.
> > >
> > > RUN3 - generates 20 random numbers with the first number based on
the
> > > "seed" value of 145.
> > >
> > > $urandom - a few surprises
> > >
> > > RUN4 - generates 20 urandom numbers.
> > >
> > > RUN5 - generates the same urandom number 20 times, each time using
> > > the seed value of 145. In P1800-2009 Ballot Draft, clause 18.13.1,
> > > last sentence in the paragraph after the prototype function is a
> > > little misleading when it says: "The random number generator (RNG)
> > > shall generate the same sequence of random numbers every time the
> > > same seed is used."
> > >
> > > RUN6 - generates the same urandom number 20 times, each time using
> > > the seed value of 145 (seeding behavior is different than
Verilog's
> > > $random from RUN3).
> > >
> > > $urandom_range - no big surprises
> > >
> > > RUN7 - generates 20 urandom_range numbers between 0-145
> > >
> > > RUN8 - generates 20 urandom_range numbers between 100-145
> > >
> > > RUN9 - generates 20 urandom_range numbers between 0-145
> > >
> > > Question - what is the correct way to seed the $urandom function
when
> > > used in procedural code outside of a class??
> > >
> > > Thanks for any feedback.
> > >
> > > Regards - Cliff
> 
> ----------------------------------------------------
> Cliff Cummings - Sunburst Design, Inc.
> 14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005
> Phone: 503-641-8446 / FAX: 503-641-8486
> cliffc@sunburst-design.com / www.sunburst-design.com
> Expert Verilog, SystemVerilog, Synthesis and Verification Training
> 
> 
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