RE: [sv-ec] reference via scope operator to parametrized superclass item

From: Daniel Mlynek <daniel.mlynek_at_.....>
Date: Wed Jun 10 2009 - 07:25:08 PDT
http://www.verilog.org/mantis/view.php?id=2787

  _____  

From: Francoise Martinolle [mailto:fm@cadence.com] 
Sent: 10 czerwca 2009 16:16
To: Daniel Mlynek
Cc: sv-ec@server.eda.org
Subject: RE: [sv-ec] reference via scope operator to parametrized superclass
item


 
If we want the unadorned name to also apply to the super class, you need to
file a mantis item.
I do not remember we considered it during our discussions.
 
Francoise
       '


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From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of Daniel
Mlynek
Sent: Wednesday, June 10, 2009 7:45 AM
To: sv-ec@eda.org
Subject: [sv-ec] reference via scope operator to parametrized superclass
item


LRM has special chapter :8.24.1 Class resolution operator for parameterized
classes
 
Unfortunatelly this chapter misses one important feature of scope operator -
it can be used to reference to super classs item. Chapter 8.24.1 does not
explicitly states that :: can be used on unadorned base class name to
reference base class item.
IMHO codes like below are shoould be legal and LRM should description should
be extended:
 
CODE:
 
class B#(p=1);
 int a;
endclass
 
class C#(p=1) extends B#(p);
 bit a;
 function void foo;
  $display(B::a); //<<<<<<<<this reference via :: is not described in LRM
 endfunction
endclass      
 
module top;
 C c;
 initial begin
  c = new;
  c.foo();
 end
endmodule
 
 
Should I fill a mantis on that?
 
 
DANiel

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Received on Wed Jun 10 07:27:10 2009

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