[sv-ec] Clocking Blocks and #0 Semantics

Hi sv-ec team, 

 

I'm trying to understand the semantics of using the #0 skew of clocking
blocks WRT scheduling and potential race conditions and am hoping you
can help me out.

 

My understanding of the LRM is that for testbench (TB) inputs, when I
use programs and clocking blocks (CB), I am guaranteed to avoid race
conditions.  If I have two signals coming from my DUT into my TB, one of
which is a clock and the other of which is a non-clock input, how is
this guaranteed to not be a race condition if I am using #0 on this
non-clock input signal?  If the non-clock input signal is seen in the
observed region, this means that the clock and the non-clock input are
seen at the same time in the TB and would hence be a race.

 

Would I be correct in assuming that had I not had a CB, that there
really would be a race condition with the clock and the non-clock input?
Would I also be correct in assuming that by virtue of using a CB and
putting the non-clock input in it, that the non-clock input will be seen
by the rest of the TB program code _after_ the clock event of the
clocking block?

 

Please let me know if I need to give an example.  

 

Thanks, -Tom


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