They are required to have them in order to be SV-compliant. But you're correct about temporal constraints. Shalom ________________________________ From: Korchemny, Dmitry Sent: Wednesday, April 09, 2008 4:53 PM To: Bresticker, Shalom; 'Mirek Forczek'; 'sv-ec@server.eda.org' Cc: 'sv-ac@server.eda.org' Subject: RE: [sv-ac] RE: [sv-ec] 1900 mantis (checkers): checker variable semantics: interoperability and portability issues. Yes, they have, but are they required having them? Also, it is not always straightforward to use constraint-solving technology to solve the temporal constraints, Dmitry ________________________________ From: Bresticker, Shalom Sent: Wednesday, April 09, 2008 4:49 PM To: Korchemny, Dmitry; Mirek Forczek; sv-ec@server.eda.org Cc: sv-ac@server.eda.org Subject: RE: [sv-ac] RE: [sv-ec] 1900 mantis (checkers): checker variable semantics: interoperability and portability issues. But simulators already have to have constraint solvers? Shalom [DK] There are several reasons for doing that. One is that the assumptions may be contradictory or contradict the RTL. The other reason is not to require from a simulator to have an embedded formal verification engine. Without such an engine you cannot guarantee to satisfy all the assumptions (and even with it you can have a blow-up). --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Wed Apr 9 07:01:10 2008
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