[sv-ec] Re: [sv-ac] Sequence expression

Thanks Dmitry


Korchemny, Dmitry wrote:

>Hi Sarani,
>
>This declaration should be illegal. Though @(posedge clk2) ##1 (ind1 &&
>ind2) is indeed legal sequence expression, but
>
>@(posedge clk1) (state == ST1)<sequence_expr>
>
>is not a legal sequence expression.
>
>Regards,
>Dmitry Korchemny, Intel Corporation
>
>-----Original Message-----
>From: owner-sv-ac@server.eda.org [mailto:owner-sv-ac@server.eda.org] On
>Behalf Of Sarani Roy
>Sent: Wednesday, January 30, 2008 1:27 PM
>To: sv-ec@server.eda.org; sv-ac@server.eda.org
>Cc: Sarani Roy
>Subject: [sv-ac] Sequence expression
>
>Hi,
>
>Is this a valid sequence declaration :
>
>sequence S;
>@(posedge clk1) (state == ST1) @(posedge clk2) ##1 (ind1 && ind2);
>endsequence
>
>According to BNF:
>
>sequence_expr ::= clocking_event sequence_expr
>clocking_event ::= @ identifier
>
>Thanks,
>Sarani
>
>
>
>
>
>  
>



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