> 14.12 says, > A default clocking is valid only within the scope > containing the default clocking specification. This > scope includes the module, interface, or program that > contains the declaration as well as any nested modules > or interfaces. It does not include instantiated modules > or interfaces. > > What about nested programs? Fair question. I think AC have recently had some discussions about this in relation to "default disable"; we probably should make sure that it's all consistent. 14.12 is also less than clear about whether it's OK to have a different default clocking in a nested module (etc), since the outer default clocking is not "specified" in the nested module, but is visible therein. Again I think AC have discussed this recently, but I can't locate the discussion. -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24 1AW, UK Tel: +44 (0)1425 471223 Email: jonathan.bromley@doulos.com Fax: +44 (0)1425 471573 Web: http://www.doulos.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Fri Nov 23 06:28:29 2007
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