RE: [sv-ec] why classes are skipped in name space definition in SV LRM

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Wed Aug 22 2007 - 02:48:40 PDT
Type names defined with typedef are included in what is called in 19.13
(of 1800-2005) "user-defined types".
 
Classes are also considered to be a user-defined type.
 
I personally think this should be more explicit.
 
See more on this in Mantis 1847:
http://www.eda.org/mantis/view.php?id=1847
 
Shalom


________________________________

	From: owner-sv-ec@server.eda.org
[mailto:owner-sv-ec@server.eda.org] On Behalf Of danielm
	Sent: Wednesday, August 22, 2007 12:06 PM
	To: sv-ec@server.eda.org
	Subject: [sv-ec] why classes are skipped in name space
definition in SV LRM
	
	
	LRM chapter 19.13. Name spaces - says nothing about classes (and
type names defined with typedef). It was forgotten to add rules for
classes here or classes are skiiped on purpose.
	 
	I'm not sure if class name is in the same space like module
name?
	 
	
	Is below code it legal or not?
	  class a;
	   int b;
	  endclass
	
	  typedef a A;
	
	  module a ();
	   A v;
	  endmodule
	 
	Same question about typedef:
	typedef int a;
	module a;
	endmodule
	 
	 
	DANiel
	 

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Received on Wed Aug 22 02:49:07 2007

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