[sv-ec] Mantis 1330 example

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Thu May 10 2007 - 02:38:16 PDT
  

Hi, the change for Mantis 1330 includes the following example, and it is
implemented in Draft 3:

interface #(parameter WIDTH=8) PBus; // A parameterized bus interface

logic req, grant;

logic [WIDTH-1:0] addr, data;

modport phy(input addr, ref data);

endinterface

module top;

PBus #(16) p16();

PBus #(32) p32();

virtual Pbus V8; // legal declaration, but no legal assignments

virtual Pbus #(35) V35; // legal declaration, but no legal assignments

virtual Pbus #(16) v16;

virtual Pbus #(16).phy v16_phy;

virtual Pbus #(32) v32;

virtual Pbus #(32).phy v32_phy;

initial begin

v16 = p16; // legal- parameter values match

v32 = p32; // legal- parameter values match

v16 = p32; // illegal - parameter values don't match

v16 = v32; // illegal - parameter values don't match

v16_phy = v16; // legal assignment from no selected modport to selected
modport

v16 = v16_phy; // illegal assignment from selected modport to no
selected modport

v32_phy = p32.phy; //legal assignment from no selected modport to
selected modport

v32 = p32.phy; // illegal assignment from selected modport to no
selected modport

end

endmodule

 

The next-to-last assignment and its comment seem to me to be
inconsistent:

v32_phy = p32.phy; //legal assignment from no selected modport to
selected modport


Should it be either 

v32_phy = p32; //legal assignment from no selected modport to selected
modport

OR

v32_phy = p32.phy; //legal assignment from selected modport to selected
modport

?

 

Thanks,

Shalom

 

 

Shalom Bresticker

Intel Jerusalem LAD DA

+972 2 589-6852

+972 54 721-1033 

 


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Received on Thu May 10 02:38:48 2007

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