[sv-ec] repeat_range in transition bins

Hi

I have a question regarding repeat range for trans_item  in transition bin.

Consider below BNF from LRM for transition bins.

trans_list ::= ( trans_set ) { , ( trans_set ) }
trans_set ::= trans_range_list { => trans_range_list }
trans_range_list ::=
     trans_item
   | trans_item [ [* repeat_range ] ]
   | trans_item [ [ > repeat_range ] ]
   | trans_item [ [= repeat_range ] ]
 
repeat_range ::=  expression
                          | expression : expression
 
From  System Verilog LRM  , it is not clear  whether ,

1) expression for repeat range will be any HDL  expression.
2) expression  for repeat range will be only covergroup variables.


Thanks
Abhishek


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