<forwarding email from Adam Krolnik> -------- Original Message -------- Date: Thu, 01 Mar 2007 08:40:02 -0600 From: Adam Krolnik <adam.krolnik@verisilicon.com> To: Eduard Cerny <Eduard.Cerny@synopsys.com> CC: SV_EC List <sv-ec@server.eda.org>, sv-ac@server.eda-stds.org Subject: Re: [sv-ac] Re: [sv-ec] mantis item 1681 - global clocking Hello Mr. Cerny; >the purpose of the goal of the global clock is to provide "time base" for all clocks >which would allow simulation and formal tools to align, to avoid mismatches. Can you give an example ? I am having a hard time understanding how this helps a system with a clock at 8.5 MHz, a clock at 120 MHz, and a clock at 250MHz, and a clock at 1.2MHz, etc. -- Soli Deo Gloria Adam Krolnik Director of Design Verification VeriSilicon Inc. Plano TX. 75074 Co-author "Assertion-Based Design" -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Thu Mar 1 18:02:22 2007
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