Re: [sv-ec] Fwd: SystemVerilog feature request - Multiple Interface / Multiple Inheritance

From: Neil Korpusik <Neil.Korpusik_at_.....>
Date: Fri Dec 08 2006 - 17:54:47 PST
<forwarding non-member email from Paul Butler>

-------- Original Message --------
To: Gordon Vreugdenhil <gordonv@model.com>
Cc: "[[[Clifford E. Cummings" <cliffc@sunburst-design.com>,
        sv-ec@server.eda.org
Subject: Re: [sv-ec] Fwd: SystemVerilog feature request - Multiple Interface /  Multiple Inheritance
From: Paul Butler <paul.butler@ni.com>
Date: Fri, 8 Dec 2006 14:07:53 -0600


Gord,

I think avoiding the word "interface" is a good idea.  I might
misunderstand you but Java seems to benefit from allowing its objects to
"be a" interface.  I can declare a variable using an interface as the
type.  When I allocate the object, I'm forced to choose a class, which
must implement the interface.  I suppose SV will require a way to choose
from several possible constructors.  I've included some Java samples of
what I mean.

Paul

Paul.Butler@ni.com
National Instruments
Austin, TX

interface i {
}

class c1 implements i {
}

class c2 implements i {
}

class c3 extends c2 {
}

class top {
  public static void main(String[] args) {
    // the 'i' typed variables can hold objects of type c1, c2, or c3.
    i o1_i = new c1();
    i o2_i = new c2();
    i o3_i = new c3();

    // the 'c2' typed variables can hold objects of type c2 or c3.
    c2 o4_c2 = new c2();
       o4_c2 = (c2) new c3();

    // the 'c3' typed variables can hold only objects of type c3.
    c3 o5_c3 = new c3();

    o2_i = o3_i;  // replace reference to a  c2 with a ref to a c3.
    o3_i = o4_c2; // replace a c3 with a c2
    o2_i = o1_i;  // replace a c3 with a c1

    o5_c3 = (c3) o4_c2; // replace a c3 with a c3.
    o4_c2 = (c2) o1_i; // runtime type mismatch (despite the cast
operation)
                       // Cannot cast a c1 to a c2
  }
}




Gordon Vreugdenhil <gordonv@model.com>
12/05/2006 04:27 PM

To
"Clifford E. Cummings" <cliffc@sunburst-design.com>
cc
sv-ec@server.eda.org, paul.butler@ni.com
Subject
Re: [sv-ec] Fwd: SystemVerilog feature request - Multiple Interface /
Multiple Inheritance






Cliff,

I am going to avoid using the word "interface" here since that has
a different meaning in SV and are quite different than a
Java "interface".

Having some way to "implement" multiple specifications (sets of
behaviors) would be a very good idea for SV.  There are some issues
involving inheritance and type parameters that would become better
defined in such a system.  This is NOT multiple inheritance (i.e.
no object "isa" relationships).

I would definitely support some form of "implements" functionality;
I would be quite opposed to adding multiple inheritance without
a truly compelling rationale.

Gord.



Clifford E. Cummings wrote:
> Hi, All -
> 
> Do we have an SVDB Mantis item for multiple inheritance? And is this the 

> same or is this slightly different?
> 
> Regards - Cliff
> 
>> X-Virus-Status: clean(F-Secure/fsigk_smtp/488/mailserv98-us)
>> To: cliffc@sunburst-design.com
>> Subject: SystemVerilog feature request
>> X-Mailer: Lotus Notes Release 6.5.3 September 14, 2004
>> From: Paul Butler <paul.butler@ni.com>
>> Date: Thu, 30 Nov 2006 14:59:20 -0600
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>>
>> Cliff,
>>
>> At DVCon 2006, I mentioned to you that I think SystemVerilog could 
>> benefit
>> from a Java style interface.  The interface I'm thinking of is an 
>> abstract
>> class with the exception that a class can implement multiple interfaces
>> (similar to multiple inheritance).
>>
>> An example interface might be "cloneable" (implements a method which
>> returns a deep copy of 'this').  I could create a container class that
>> could contain objects of any class that implements "cloneable".  A
>> "comparable" interface (implements a method to compare 'this' to 
another
>> object) would allow me to build an ordered container for any class 
>> that is
>> both "cloneable" and "comparable".
>>
>> Mentor Graphics' AVM cookbook has some good examples of how such an
>> interface would be used:
>> http://www.mentor.com/products/fv/_3b715c/cb_dll.cfm
>>
>> Paul Butler
>>
>> Paul.Butler@ni.com
>> National Instruments
>> Austin, TX
> 
> ----------------------------------------------------
> Cliff Cummings - Sunburst Design, Inc.
> 14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005
> Phone: 503-641-8446 / FAX: 503-641-8486
> cliffc@sunburst-design.com / www.sunburst-design.com
> Expert Verilog, SystemVerilog, Synthesis and Verification Training
> 
> 

-- 
--------------------------------------------------------------------
Gordon Vreugdenhil                                503-685-0808
Model Technology (Mentor Graphics)                gordonv@model.com
Received on Fri Dec 8 17:54:51 2006

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