RE: [sv-ec] Query related to virtual methods in a class

>From: "Arturo Salz" <Arturo.Salz@synopsys.com>

>I believe that the argument names should not be required to match across
>class extensions. Thus, Kakoli's example should be legal.

I disagree.  That might work well enough in languages like C++ that only
connect arguments by position.  But SystemVerilog allows connecting
arguments by name.  The names should be identical, to avoid confusion
when connecting by name.

Your suggestion would allow the base class to declare
  virtual task t(int a,b);
while the derived class declared
  virtual task t(int b,a);
  
Then if somebody called the task using an object of the derived type
via a handle of the base type, the call
  t(.a(1), .b(2));
would end up passing 1 to b and 2 to a in the actual task called,
despite appearances.  This would be confusing and undesirable.

I believe that the clarification in item 1308 to require the names
to match is not just a mistaken merging of the two types of matching,
but is a desirable requirement for SystemVerilog.

Steven Sharp
sharp@cadence.com