Forwarding more email from Johny. -------- Original Message -------- Subject: [P1800] SystemVerilog Draft6 and Verilog Draft7 are available for download Date: Wed, 09 Nov 2005 19:16:12 -0600 From: Johny Srouji <srouji@us.ibm.com> To: ieee1800@eda.org, btf@boyd.com, etf@boyd.com, ieee1800@eda.org, owner-ieee1800@eda.org, sv-ac@eda.org, sv-bc@eda.org, sv-cc@eda.org, sv-ec@eda.org Hi All, Given that technical committees have resumed their work on Errata resolutions, they will need to base their work on the latest drafts. The IEEE approved versions are still under work, but for now you can use the latest drafts which we submitted for approval. IEEE P1800 Working Group members, can find the LRM under: SystemVerilog: _http://grouper.ieee.org/groups/1800/private/p1800_draft-D6.pdf_ Verilog: _http://grouper.ieee.org/groups/1800/private/p1364_draft-D7.pdf_ Use your IEEE member login to access the web site. Dennis will upload these two drafts on eda.org later this week and send a notice. For others who are actively contributing and working on the standards, but not IEEE P1800 member, and need access, I propose the following procedure: 1- Please pass this request to your committee technical chair 2- Technical chairs will consolidate a list and send it to me 3- Those who are active members in the technical committee shall be granted this draft For all others, you will be able to download and purchase the approved LRM through the IEEE web shortly. Regards, --- Johny Srouji, IBM, P1800 WG Chair -- --------------------------------------------------------------------- Neil Korpusik Tel: 408-720-4852 Senior Staff Engineer Fax: 408-720-4850 Frontend Technologies - ASICs & Processors (FTAP) Sun Microsystems email: neil.korpusik@sun.com ---------------------------------------------------------------------Received on Thu Nov 10 10:42:24 2005
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