Cliff, As far as I can tell, there is no mechanism, language or API, to access individual bin counts, or even individual coverpoints. There is only the get_coverage method that can be used on an instance of a covergroup, or across all instances using the :: operator. That method only gives you the total number of bins that have reached the at_least threshold. Currently, the only way to code for what you would like is to create a separate covergroup for the specific purpose you want the testbench to react to. It would be straightforward to extend get_coverage() to work on individual, explicitly named coverpoints, since their naming conventions are consistent with members of structs or classes. But naming of bins gets complicated, especially when defining cross coverage. Dave > -----Original Message----- > From: owner-sv-cc@eda.org [mailto:owner-sv-cc@eda.org] On Behalf Of > Clifford E. Cummings > Sent: Friday, July 08, 2005 10:54 PM > To: sv-ec@eda.org; sv-ac@eda.org; sv-cc@eda.org > Subject: [sv-cc] Coverpoint bins & functional coverage > > Hi, All - > > A question for all you smart coverage experts using SystemVerilog coverage > capabilities. > > * Coverpoint bins > > Can I assume that the coverpoint bins are integers and that I can do > random > functional stimulus generation based on the comparisons to count values in > the coverpoint bins? (Keep generating more random stimulus until I see a > coverpoint bin == 2?) > > I know that coverpoints and covergroups are used by vendor tools to report > functional coverage information, but since the bins are already keeping > track of how many times a coverpoint has been seen, it seems like I should > be able to loop until I see certain coverpoints incremented. > > If I can do this, what will the hierarchical name be for the coverpoints? > (covergourp_instance_name.bin_name??) > > Am I missing something fundamental in these questions? > > Regards - Cliff > > > ---------------------------------------------------- > Cliff Cummings - Sunburst Design, Inc. > 14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005 > Phone: 503-641-8446 / FAX: 503-641-8486 > cliffc@sunburst-design.com / www.sunburst-design.com > Expert Verilog, SystemVerilog, Synthesis and Verification Training > >Received on Tue Jul 12 00:02:06 2005
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