[sv-ec] Agenda Meeting Friday April 15th, 2005 sv-ec ballot resolution committee

From: Mehdi Mohtashemi <Mehdi.Mohtashemi_at_.....>
Date: Wed Apr 13 2005 - 00:34:08 PDT
	The next meeting of sv-ec ballot resolution committee will
	be on Friday April 15th, 2005.

	    Date: Friday April 15th, 2005
	    Time: 8:00 am - 10:00 am Pacific Time
	    Conf. call dial-in Phone information
	    Toll Free Dial In Number: (888)635-9997
	    International  Number:  1(763)315-6815
	    PARTICIPANT CODE: 6343466 #


	Agenda:
	1) Review IEEE patent policy
	  http://standards.ieee.org/board/pat/pat-slideset.ppt 
	2) Review Meeting minutes, April 12th, 2005.
	
	3) Continue the resolution of ballot issues 
 Please review the remaining items (quite a few, plus 3 that
 have been added from other committees) for Friday.
- Mehdi

===========================================
== Issues not yet resolved/voted on =======
	 
Negative / High
-----Issue # --  Mantis # ------		
	233		
	235	666					
	238 
	240			
		
Positive / High
	281
Negative
	266 (NoTES)			
	 

Positive High
--  Issue #  --- Mantis # ------
	2		
	5		
	7		
	8		
	10		
	13		
	22		
	23		
	24		
	30		
	31	551	
	32	553	
	36	270	
	94	511	
	95	512	
	96	516	
	97	518	
	98	519	
	99	521	
	100	522	
	101	523	  	
		
Positive / Low 
--  Issue # --- Mantis # -------
	122	251	  	
	123	253	
	162	552	 		  		
	171	564	
	187	594	
	188	595	
	190	597	
	199	607	
	200	608	
	201	609	

Issues sent to sv-ec from other committees
     Mantis 615: 
 ------------------------------------
    There were 3 champions that gave the following feedback.
     http://www.eda.org/sv/sv-champions/Resolved_Issues_05_04_11.htm
     Need to reword first sentence of 5.6:
       One or dimensions of an array or queue can be dynamic...
       Add 2 dimensional example.
     We should consider making these changes. Stu said that he thinks
that
     the BNF change is now in conflict with the text.
 ------------------------------------
	  1	from sv-bc
	244	from sv-bc
 --- For issue 244 ---------------------------------------------------
  The SV-BC approved the proposal in Mantis issue 632
  and believes this resolves ballot issue 244.

  The SV-BC also believe that the SV-EC should review
  the issue & its resolution in case it conflicts
  with SV-EC requirements.

   the previous feedback was:

   "Currently, the actuals of interface ports are not restricted in
terms 
   of hierarchical references to interface instantiations. This can
cause
   problems similar to other circular elaboration dependencies with
   generates 
   that IEEE-1364 very carefully avoids."


  And the proposed addition to the LRM forbids interface port actuals
  from being hierarchical references through arrays of intances or
   generated
  instances:

At the end of 20.2, ADD

If the actual of an interface port connection is a hierarchical
reference to 
an interface or a modport of a hierarchically referenced interface, the
hierarchical 
reference shall refer to an interface instance and shall not resolve
through an arrayed 
instance or a generate block.

The SV-BC thought the SV-EC should know about such a restriction.
Would you please run this by the EC?
------------------------------------------------------
Received on Wed Apr 13 00:34:24 2005

This archive was generated by hypermail 2.1.8 : Wed Apr 13 2005 - 00:35:04 PDT