[sv-ec] Agenda Meeting Tuesday April 12, 2005 sv-ec ballot resolution committee

From: Mehdi Mohtashemi <Mehdi.Mohtashemi_at_.....>
Date: Mon Apr 11 2005 - 23:38:32 PDT
The next meeting of sv-ec ballot resolution committee will
be on Tuesday April 12th, 2005.

    Date: Tuesday, April 12th, 2005
    Time: 2:00pm - 4:00pm Pacific Time
    Conf. call dial-in Phone information
    Toll Free Dial In Number: (888)635-9997
    International  Number:  1(763)315-6815
    PARTICIPANT CODE: 6343466 #


Agenda:
1) Review IEEE patent policy
  http://standards.ieee.org/board/pat/pat-slideset.ppt 
2) Review Meeting minutes, April 11th, 2005.
http://www.eda.org/sv-ec/Minutes/SV-EC_BallotRes_Meeting_April_11_2005_M
inutes.txt
3) Continue the resolution of ballot issues 

==================================
== Issues not yet resolved =======
	 
Negative / High
-----Issue # --  Mantis # ------
	232	 652		
	233		
	235			
	236			
	238 & (together)
	189 	596 			
	240			
		
Positive / High
	281
Negative
	266 (Notes)		
	
	
Negative / High		
--  Issue #  --- Mantis # ------
	255		

Positive High
--  Issue #  --- Mantis # ------
	2		
	5		
	7		
	8		
	10		
	13		
	22		
	23		
	24		
	30		
	31	551	
	32	553	
	36	270	
	94	511	
	95	512	
	96	516	
	97	518	
	98	519	
	99	521	
	100	522	
	101	523	  	
		
Positive / Low 
--  Issue # --- Mantis # -------
	122	251	  	
	123	253	
	162	552	 		  		
	171	564	
	187	594	
	188	595	
	190	597	
	199	607	
	200	608	
	201	609	

Issues sent to sv-ec from other committees
	  1	from sv-bc
	244	from sv-bc
------------------------------------------------------
For issue 244, the feedback was:

"Currently, the actuals of interface ports are not restricted in terms 
of hierarchical references to interface instantiations. This can cause
problems similar to other circular elaboration dependencies with
generates 
that IEEE-1364 very carefully avoids."


And the proposed addition to the LRM forbids interface port actuals
from being hierarchical references through arrays of intances or
generated
instances:

At the end of 20.2, ADD

If the actual of an interface port connection is a hierarchical
reference to 
an interface or a modport of a hierarchically referenced interface, the
hierarchical 
reference shall refer to an interface instance and shall not resolve
through an arrayed 
instance or a generate block.

The SV-BC thought the SV-EC should know about such a restriction.
Would you please run this by the EC?
------------------------------------------------------	
  	

==== Issues sent to other committees for review 
==== 
	125	294	(sv-ac)	 (vpi question)
	229	644	(sv-bc)  (struct initialization)
[NOTE: SV-BC had the following decision made on 229

The SV-BC reviewed the proposal to address issue 229 in
its April 11th meeting.  It was not approved.  Here's
the message that the committee agreed to convey
to the EC:

  The SV-BC did not pass the proposed resolution to issue
  229 as captured in Mantis #644.  The motion failed 
  with only abstention.


Those abstaining felt that making such a change so late
in the lifecycle of the LRM was not a good idea.  They
had concerns about issues such as:
 -continuous assignment to variables
 -initializer passed with with Type through parameters
  which is a new paradigm.
-------------------------------------------------------------
Received on Mon Apr 11 23:38:43 2005

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