Folks, In addition to our list, here is #244 (from BC) that we shall need to discuss. - Mehdi -----Original Message----- From: Maidment, Matthew R [mailto:matthew.r.maidment@intel.com] Sent: Monday, April 11, 2005 12:19 AM To: Mehdi Mohtashemi Subject: Another issue for SV-EC to review: #244 (SVDB 632) Hi Mehdi For issue 244, the feedback was: "Currently, the actuals of interface ports are not restricted in terms of hierarchical references to interface instantiations. This can cause problems similar to other circular elaboration dependencies with generates that IEEE-1364 very carefully avoids." And the proposed addition to the LRM forbids interface port actuals from being hierarchical references through arrays of intances or generated instances: At the end of 20.2, ADD If the actual of an interface port connection is a hierarchical reference to an interface or a modport of a hierarchically referenced interface, the hierarchical reference shall refer to an interface instance and shall not resolve through an arrayed instance or a generate block. The SV-BC thought the SV-EC should know about such a restriction. Would you please run this by the EC? Thanks, Matt -- Matt Maidment mmaidmen@ichips.intel.comReceived on Mon Apr 11 09:26:11 2005
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