RE: [sv-ec] email ballot -- closes midnight October 7.2004

 
 
   Errata
      7 Clarification to 20.4.1, new 20.10
                 _XX_ Yes ____ No
        This Yes is for the .pdf version of the proposal. The .html version does not display correctly so as to be readable.
 
      8 Randsequence grammar issues
                 _XX_ Yes ____ No
 
    173 Is the order of declaration in a covergroup
                 _XX_ Yes ____ No
 
    197 Is a String an array
                 _XX_ Yes ____ No
 
    203 Section 3.7, delete the sentence "and embedded null bytes are
 included"
                 ____ Yes _XX_ No

        On further thought, System Verilog does allow a string to contain null bytes. That being the case, this proposal only removes the statement that they are included in a string compare - but does not specify how an embedded (not trailing) null byte is treated. Is it just another charater (if so why remove the text). Does it terminate the comparison (as might better match C).
 
    231 Clarify the second paragraph in Section 16.5
                 _XX_ Yes ____ No
   
    236 Behavior of the cycle_delay with 'Zero' value
                 _XX_ Yes ____ No
 
    238 Pipelined value access in clocking block
                 ____ Yes _XX_ No

        This and #240 were combined into #255 so these shouldn't be voted on directly.
 
    240 Expression evaluation with cycle_delay
                 ____ Yes _XX_ No
          
        This and 238 were combined into #255. #255 is a significant extension to add blocking expression. This at least needs additional discussion prior to a vote.

- Ray
Received on Thu Oct 7 16:55:11 2004