RE: FW: [sv-ec] email ballot -- closes midnight October 7.2004

In most contexts, such as within a begin-end or fork-join block,
a ; after and endcase is legal syntax in SystemVerilog.

>> 8 Randsequence grammar issues
>> __XX__ Yes ____ No
>>
>Note: the semicolon after endcase in the example is a separate issue
>that appears in the original text.

-- Brad
Received on Fri Oct 1 17:52:58 2004