RE: [sv-ec] Typos in section 4

From: David W. Smith <dwsmith@synopsys.com>
Date: Mon Mar 15 2004 - 10:54:08 PST

These two changes are already in ERR-84 and implemented in LRM-300.

 

Thx.

 

Regards

David

 

David W. Smith

Synopsys Scientist

 

Synopsys, Inc.

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-----Original Message-----
From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of Dave Rich
Sent: Sunday, March 14, 2004 11:43 PM
To: sv-ec@eda.org
Subject: [sv-ec] Typos in section 4

 

In section 4.3 change 5 to 6

bit [9:0] foo6;
foo56 = foo1[2]; // a 10 bit quantity.

In section 4.8 Remove the 4 between "of" and "strings"

For example, the declaration:

task foo( string arr[] );

declares a task that accepts one argument, a dynamic array of 4 strings.

-- 
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David.Rich@Synopsys.com
Technical Marketing Consultant and/or
Principal Product Engineer
http://www.SystemVerilog.org
tele:  650-584-4026
cell:  510-589-2625
 
Received on Mon Mar 15 10:55:12 2004

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