[sv-ec] Clarifications to the string types


Subject: [sv-ec] Clarifications to the string types
From: Dave Rich (David.Rich@synopsys.com)
Date: Thu Feb 26 2004 - 15:41:24 PST


The attached clarifications update terminology relating to strings to be
in line with the rest of the document, clarifies the behavior of string
operations to be backward compatible with Verilog-2001.

It also changes the behavior of $bits to be mathematically correct and
return 0 when used on dynamically sized objects, such as strings, that
are currently empty.

-- 
--
David.Rich@Synopsys.com
Technical Marketing Consultant and/or
Principal Product Engineer
http://www.SystemVerilog.org
tele:  650-584-4026
cell:  510-589-2625


string.pdf



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