Subject: Re: [sv-ec] Randomize of 4-state variables
From: Arturo Salz (Arturo.Salz@synopsys.com)
Date: Sun Jun 22 2003 - 23:23:21 PDT
Ray,
The constraints and the solver are limited to 2-state values. The solver will not
generate X or Z values, even if the random variable is a 4-state variable.
This implies that each bit has equal probability of being 0 or 1 (barring any other
constraints).
To generate 4-state values, users can generate two random values and then
combine them into a 4-state variable (typically in post_randomize).
This also means that the example below is not a legal constraint.
Arturo
----- Original Message -----
From: "Ryan, Ray" <Ray_Ryan@mentorg.com>
To: "'sv-ec@server.eda.org'" <sv-ec@eda.org>
Sent: Friday, June 20, 2003 11:43 AM
Subject: [sv-ec] Randomize of 4-state variables
What is the result of randomization for 4-state variables?
In section 12 there are several examples of specifying the
'rand' property qualifier on a 4-state variable. For example
section 12.3 Random Variables contains the example code:
rand bit [7:0] len;
rand integer data[];
constraint db { data.size == len; }
However, there is no mention of whether X or Z values are
generated by the randomize() method.
By default, I'd expect that for each bit 0,1,X,Z have equal
probability. So the likelyhood of generating a value for a
32-bit integer with no X or Z bits would be very low.
If this is the case, is there a way to specify that a random
value generated for an 'integer' only contain 0,1,X because
a Z value would be invalid. I.E. you want to allow X but
not Z in the generated values. Other than:
rand reg [31:0] intg_val;
rand integer x;
constraint x01 { intg[0] inside {0,1,bX};
intg[1] inside {0,1,bX};
...
intg[31] inside {0,1,bX};
}
constraint c2 { x == intg_val; };
Or how would you constrain the generated values for the array
'data' above to not include X or Z (want valid/defined data).
- Ray
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