Press Release

ACCELLERA AND THE IEEE ANNOUNCE APPROVAL OF NEW AND REVISED ELECTRONIC DESIGN STANDARDS: New IEEE standards improve nanometer design library descriptions, synthesis, VHDL

October 7, 2003, Napa, Calif.—Accellera, the EDA organization focused on language-based design standards and the IEEE Standards Association (IEEE-SA) today announced that Accellera's Advanced Library Format (ALF) has been approved as IEEE 1603-2003. In addition, the VHDL and Verilog RTL synthesis standards have passed balloting and are now IEEE 1076.6-1999 and IEEE 1364.1-2002, respectively, and IEEE 1076-2002 (VHDL) adds new features.

These IEEE standards improve nanometer design library descriptions and tools, Verilog and VHDL and synthesis.

"Accellera's objective is to have the IEEE formalize and certify all our standards, noted Dennis Brophy, Accellera chairman. "The ALF standard and the Verilog and VHDL standard improvements are examples of how Accellera's members work with and support the leading international electronics standards body to improve the IC design process."

About IEEE
1603 (ALF) IEEE 1603 standardizes the language and semantic representation for design libraries. It supports an RTL to GDSII descriptions of functional, electrical performance and layout views for technology libraries, scalable from cells to complex hierarchical design blocks.

The ALF effort was started in 1996. ALF was released as an Accellera standard in 2000. Accellera assigned the ALF copyright to the IEEE in 2001, and ALF became an IEEE project. The objective was to create a standard that addresses long-term library modeling requirements for next-generation EDA applications and maintain compatibility and interoperability with existing library formats and development practices.

About Verilog and VHDL RTL Synthesis Standards
The IEEE 1076.6 and 1364.1 (Verilog and VHDL RTL) synthesis standards define the syntax and semantics that can be used by all compliant RTL synthesis tools to achieve uniformity and interoperability.

IEEE 1076 (VHDL) Improvements
The IEEE 1076 standard includes three enhancements. The definition of concatenation and real types improves portability among tools. VHDL now supports multi-byte characters within comments. This allows users to document their designs in their native language, such as Japanese, Korean and Chinese. Buffer mode ports are improved so that they can be easily used with OUT or INOUT mode ports. When designing library components or designing a block that uses library components, this change makes it easy to use a single coding style (single port type) that can be used in any context.

Price and Availability
IEEE 1076 (VHDL) and IEEE 1364 (Verilog) documentation is available at www.ieee.org or by calling 1.800.678.IEEE. A draft of the ALF (IEEE 1603) documentation is available at http://www.eda.org/alf.

About Accellera
Accellera is an electronics industry organization driving the worldwide development and use of standards required by systems, semiconductor, and design tools companies that enhance a language-based design automation process. For more information, please visit www.accellera.org.

About the IEEE Standards Association
The IEEE Standards Association, a globally recognized standards-setting body, develops consensus standards through an open process that brings diverse parts of an industry together. These standards set specifications and procedures based on current scientific consensus. The IEEE-SA has a portfolio of more than 870 completed standards and more than 400 standards in development. Over 15,000 IEEE members worldwide belong to IEEE-SA and voluntarily participate in standards activities. For further information on IEEE-SA see: http://standards.ieee.org.

Notes to editors
Acronyms:
ALF - Advanced Library Format
API - Application Programming Interface
EDA - Electronic Design Automation
GDSII - Graphic Design System II
HDL - Hardware Description Language
IC - Integrated Circuit
IEEE - Institute of Electrical and Electronic Engineers
IEEE 1076 - IEEE VHDL standard
IEEE 1364 - IEEE Verilog HDL standard
IEEE 1603 - IEEE ALF standard
RTL - Register Transfer Level
VHDL - VHSIC (Very High-Speed IC) HDL

For more information about Accellera: call (408) 358-9510, fax (408) 358-3910, e-mail info@accellera.org

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