Accellera Approves New Version of Co-Emulation Modeling Interface Standard for High Performance Electronic Design Verification

  Interface Improves Designer Productivity & Model Portability for Transaction-Level Verification on Heterogeneous Platforms

  NAPA, California–May 31, 2005-- Accellera, the electronics industry organization focused on electronic design automation (EDA) standards, today announced that its Board of Directors, representing systems, semiconductor and design tool member companies, has approved Accellera’s Standard Co-Emulation Modeling Interface ( SCE-MI) 1.1 as an Accellera verification standard last month.

  The SCE-MI specification improves high speed transaction-level verification between different hardware and software simulation and emulation systems. To further support designers and encourage continued adoption, SCE-MI 1.1 improves model portability between different verification acceleration tools.

  Dennis Brophy, Accellera chair, commented. “To increase the use and acceptance of the SCE-MI standard and the availability of models that work with it, our Interface Technical Committee has improved the portability of 3rd party models to make it worthwhile for more developers to support SCI-MI-based models.”

  “We are pleased to see the early adoption and acceptance of our SCE-MI specification and are now beginning work on the next version, which will improve usability and coupling with design languages at higher levels of abstraction,” added Brian Bailey, Chair of Accellera’s Interface Technical Committee (ITC), the committee charged with developing the SCE-MI standard.

  Value of Working at the Transaction Level

Transaction level modeling enables engineers to work at a higher level of abstraction, which has many positive effects such as improving comprehension about the design, increased performance of the verification process and increased efficiency in the creation of testbenches. Accelerated verification solutions have in the past not adequately supported transaction-based verification environments. To bridge the levels of abstraction, transactor models are necessary. Before the existence of SCE-MI, the transactors converting from abstract to detailed had to run entirely in the software simulator which placed a large burden on the communications with the accelerator. SCE-MI allows placing the low level, time consuming parts of these transactors on the accelerator, speeding up the models and communications with the accelerator so that the whole system operates at much higher levels of performance.

  ITC Plans

The ITC is now working on defining the next version of the specification which will improve usability and enable the use of SCE-MI transactors for simulation and acceleration. The committee is currently reviewing proposals and a specific plan for the next version is targeted for completion at the end of the year.

  SCE-MI Committee & Specification Availability Information

The charter of the ITC is to identify and standardize multi-abstraction and multi-domain interfaces that enable complete, high performance verification environments. Additional information about the committee can be found at www.accellera.org/activities with pointers to links to where the latest version of the specification can be downloaded.

  About Accellera

Accellera provides design standards for quick availability and use in the electronics industry. The organization and its members cooperatively deliver much-needed EDA standards that lower the cost of designing commercial IC and EDA products. As a result of Accellera’s partnership with the IEEE, Accellera standards are provided to the IEEE standards body for formalization and ongoing change control. For more information about Accellera, please visit www.accellera.org.

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  Press Contact: Georgia Marszalek, ValleyPR for Accellera, +650 345 7477, Georgia@ValleyPR.com

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