Advisory: Accellera Invites Analog, Digital & AMS Experts To Its Open SystemVerilog-AMS Workshop, April 13, San Jose, California

 

Group to Define 1st Hardware Design Verification Language for Mixed-Signal Design

 

SAN JOSE, Calif.-- Accellera, the electronics industry organization focused on electronic design automation (EDA) standards (based in Napa, CA, USA), announced today that it will hold an open forum to promote Mixed-Signal electronic design language development with the extension of Verilog-AMS into the SystemVerilog standard. The organization is calling for participation and invites analog, digital, and Analog Mixed Signal (AMS) experts to attend and participate.

 

Date: Wednesday, April 13, 2005

Time: 9:30 AM - 3:00 PM

Location: Cadence, San Jose, California

 

To register, please visit http://www.accellera.org/events/register. Registration is required to reserve a seat.

 

Background

Accellera recently announced the approval of Verilog AMS 2.2 as an Accellera standard. (See www.accellera.org.) The next version of the standard will focus on aligning it with the IEEE 1800 SystemVerilog standard by adding constructs to enhance  modeling capabilities.

 

Agenda

Cadence Design Systems will present a proposal to utilize SystemVerilog features to enhance Verilog-AMS. The focus will be a technical review of the Cadence donation and solicitation of input on the requirements for the next generation AMS design and verification language. The workshop will also address the implication of Direct Programming Interface (DPI) enhancements and testbench extensions for Mixed-Signal design and verification.

  • Introduction and goals for the 3.0 version of the Language
  • SystemVerilog proposal for alignment with Verilog-AMS.
  • Company positions with respect to language requirements
  • Plans and milestones to deliver the industry’s first Hardware Design Verification Language (HDVL) for Mixed-Signal design.
  • Action items and planned activities.

About Accellera

Accellera provides design standards for quick availability and use in the electronics industry. The organization and its members cooperatively deliver much-needed EDA standards that lower the cost of designing commercial IC and EDA products. As a result of Accellera’s partnership with the IEEE, Accellera standards are provided to the IEEE standards body for formalization and ongoing change control. For more information about Accellera, please visit www.accellera.org.

 

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Press Contact: Georgia Marszalek, ValleyPR for Accellera, 650 345-7477, Georgia@ValleyPR.com

 

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