At a crossroads – developing the next generation Analog/Mixed-Signal language standard(s)
Today's embedded and integrated systems interact more and more tightly with the analog physical environment, where digital HW/SW subsystems become functionally interwoven with analog/mixed-signal (AMS) blocks such as radio frequency (RF) interfaces, power electronics, or sensors and actuators. Examples are software defined radios, wireless sensor networks, and automotive applications, in which analog electronics are controlled, configured, or calibrated using digital techniques in hardware or software.
Historically, the hardware description languages Verilog-AMS and VHDL-AMS have addressed the analog implementation aspects but have limited capabilities to address the system-level design and verification challenges. From the digital perspective, SystemC and SystemVerilog focus on system-level design and verification, respectively. The SystemC AMS extensions are positioned to address the mixed-signal architectural design challenges, whereas SystemVerilog extensions are under development to include abstract analog signal representation in functional verification. Obviously, we are at a crossroads, where Verilog-AMS and VHDL-AMS are being updated and at the same time SystemC and SystemVerilog are expanding to support abstract AMS modeling styles. Should all of these AMS extensions remain compatible? Which elements are not yet addressed in the mixed-signal modeling and simulation domain but are essential for a next generation mixed-signal language? Can we focus on only one "mother HDL", or do we need more?
At this Birds-of-a-Feather session, these questions will be discussed and viable directions for the next step in AMS standards will be explored. AMS and RF system-level designers, circuit designers, verification engineers, and EDA vendors are invited to discuss the requirements and needs for the next-generation AMS languages