[sv-bc] RE: [sv-ac] Is explicit covergroup variable declaration illegal inside class?

From: Bresticker, Shalom <shalom.bresticker@intel.com>
Date: Thu Jan 21 2010 - 01:26:54 PST

Surya,

Questions on covergroups should go to sv-ec.
Please make sure your questions go to the appropriate committee.

Subclause 19.4 (Using covergroup in classes) explains:

"In class xyz, defined below, members m_x and m_y are covered using an embedded covergroup:

class xyz;
bit [3:0] m_x;
int m_y;
bit m_z;

covergroup cov1 @m_z; // embedded covergroup
        coverpoint m_x;
        coverpoint m_y;
endgroup

        function new(); cov1 = new; endfunction
endclass

In this example, data members m_x and m_y of class xyz are sampled on every change of data member m_z.

A covergroup declaration within a class is an embedded covergroup declaration. An embedded covergroup declaration declares an anonymous covergroup type and an instance variable of the anonymous type. The covergroup_identifier defines the name of the instance variable. In the above example, a variable cov1 (of the anonymous coverage group) is implicitly declared."

Regards,
Shalom

> -----Original Message-----
> From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On
> Behalf Of Surya Pratik Saha
> Sent: Thursday, January 21, 2010 9:33 AM
> To: sv-bc@eda.org; sv-ac@server.eda.org
> Subject: [sv-ac] Is explicit covergroup variable declaration
> illegal inside class?
>
> For the following case:
> class test;
> covergroup cg;
> endgroup
>
> cg c1;
> function new();
> c1 = new;
> endfunction
> endclass
>
> All the standard simulators fail for 'c1' declaration. But I
> could not
> find anything in the SV 2009 LRM restricting that.
---------------------------------------------------------------------
Intel Israel (74) Limited

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Received on Thu Jan 21 01:28:29 2010

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