________________________________________ From: owner-sv-ec@eda.org [owner-sv-ec@eda.org] On Behalf Of jonathan.bromley@doulos.com [jonathan.bromley@doulos.com] Sent: Saturday, May 30, 2009 3:05 PM To: sv-ec@eda.org Subject: [sv-ec] Mantis 2380 - array assignment compatibility proposal I've uploaded a draft proposal to Mantis. I'm quite concerned about the back-compatibility issue that was raised by Greg Jaxon - see http://www.eda-stds.org/sv-ec/hm/6818.html The killer question is: do you know of users who are, today, exploiting bitstream casting to variable-size arrays as a way to pack one array into another of different element type? Such usages would be broken under this proposal, and would have to be rewritten as a streaming concatenation {>>{}}. -- Jonathan Bromley Consultant Doulos - Developing Design Know-how VHDL * Verilog * SystemVerilog * SystemC * PSL * Perl * Tcl/Tk * Project Services Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24 1AW, UK Tel: + 44 (0)1425 471223 Email: jonathan.bromley@doulos.com Fax: +44 (0)1425 471573 http://www.doulos.com -------------------------------------------------------------------------------- Doulos Ltd is registered in England and Wales with company no. 3723454 Its registered office is 4 Brackley Close, Bournemouth International Airport, Christchurch, BH23 6SE, UK. This message may contain personal views which are not the views of Doulos, unless specifically stated. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Sun May 31 09:06:24 2009
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