Shalom, > Attempting out-of-bounds writes is *not* expected in most real situations. > Many languages don't let you do it at all. > Verilog not only does it, it does not even tell you it is doing it, and detecting it is a real pain. The no-op semantics of Verilog out-of-bounds writes (for known indices) does seem weird. By analogy with the x-pessimism of much of the language, I would have expected maybe the entire array to be x'ed out. How often does this gotcha get you in practice? -- Brad -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Sat May 2 00:47:07 2009
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