RE: [sv-bc] parameter_port_list - are paranthesis obligatory

From: Rich, Dave <Dave_Rich_at_.....>
Date: Mon Feb 09 2009 - 09:30:14 PST
I always thought the intention was to allow optional parenthesis for
#single_token

 

Dave

 

 

________________________________

From: owner-sv-bc@server.eda.org [mailto:owner-sv-bc@server.eda.org] On
Behalf Of Daniel Mlynek
Sent: Monday, February 09, 2009 7:34 AM
To: sv-bc@server.eda-stds.org
Subject: [sv-bc] parameter_port_list - are paranthesis obligatory

 

In parameter_port_list definition paranthesis are obligatory : 

parameter_port_list ::=
# ( list_of_param_assignments { , parameter_port_declaration } )
| # ( parameter_port_declaration { , parameter_port_declaration } )
| #( )

However this is imposible to check this restriction on compilation -
becasue primitive instantation syntax allow to use #NUMBER
specification. So below code can be compiled even if sub is module
definition:

module top;
 sub #1 uut(); //legal vs illegal when sub is module
 udp1 #1 uut1(); //illegal when udp1 is udp
endmodule

Maybe LRM should allow make skipping paranthesis legal as this is
impossible on compilation to check it.

This problem is also inherited by parametrized classes.

C #1 c=new; //legal vs illegal?

 

DANiel


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Received on Mon Feb 9 09:29:45 2009

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