[sv-bc] compilation of unselected module instantiations

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Thu Jan 15 2009 - 04:12:45 PST
Hi,

Suppose I have a generate block with conditional module instantiations, like this:

module m;

generate
        if (1)
                m1 m1();
        else
                m2 m2();
endgenerate

endmodule

In this, m and m1 are compiled and elaborated, and m is the top-level module.

However, when running simulators, that if the tool can find m2 (e.g., suppose it is found in a library directory), then it compiles m2 as well, but does not elaborate it.

However, if it does not find m2, then it also continues without a problem.

All the simulators I tested had the same behavior. One issued an informational message that it did not find m2.

What is the explanation and consistency of this behavior? If the tool does not need m2, why compile it? If the tool does need m2, how does it manage without finding the module?

Thanks,
Shalom

Shalom Bresticker
Intel Jerusalem LAD DA
+972 2 589-6582
+972 54 721-1033


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Received on Thu Jan 15 04:15:13 2009

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