RE: [sv-bc] Member select or hierarchical name

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Wed Jan 07 2009 - 05:50:54 PST
I'm not sure what you mean by 'revisit'.
On the face of it, your example is similar to the following from 23.7:

module m;

import p::*;

if (1) begin : s1

initial begin

s1.x = 1; // dotted name 1

s2.x = 1; // dotted name 2

f.x = 1; // dotted name 3

f2.x = 1; // dotted name 4

end

int x;

some_module s2();

end

endmodule

The following describes the resolution of each of the dotted names:

..

- Dotted name 2: The first name component is s2. Since at the time of analysis the module instantiation scope s2 (from some_module s2();) is not yet visible, the name s2 binds to the visible name s2 from package p and rule 1 applies. This causes s2 to be imported into module m as would occur with a normal variable reference.


Shalom
________________________________
From: Surya Pratik Saha [mailto:spsaha@cal.interrasystems.com]
Sent: Wednesday, January 07, 2009 2:50 PM
To: Bresticker, Shalom
Cc: sv-bc@eda.org
Subject: Re: [sv-bc] Member select or hierarchical name

Hi Shalom,
So can you answer my original query that - is it required to revisit the 'hierarchical name' after completing the traversal of scope to convert it as 'memory select'. LRM is silent on that.

Regards
Surya



-------- Original Message  --------
Subject: Re:[sv-bc] Member select or hierarchical name
From: Bresticker, Shalom <shalom.bresticker@intel.com><mailto:shalom.bresticker@intel.com>
To: Surya Pratik Saha <spsaha@cal.interrasystems.com><mailto:spsaha@cal.interrasystems.com>
Cc: "sv-bc@eda.org"<mailto:sv-bc@eda.org> <sv-bc@eda.org><mailto:sv-bc@eda.org>
Date: Wednesday, January 07, 2009 6:12:51 PM
Now I see what you mean.

Shalom

________________________________
From: Surya Pratik Saha [mailto:spsaha@cal.interrasystems.com]
Sent: Wednesday, January 07, 2009 2:30 PM
To: Bresticker, Shalom
Cc: sv-bc@eda.org<mailto:sv-bc@eda.org>
Subject: Re: [sv-bc] Member select or hierarchical name

Hi Shalom,
An identifier can't be used as forward reference like task enable or function call. So for the following example:

module top;
int x;
if (1) begin : b // generate block
initial x = 1; // pointing to 'int x' inside module
bit x;
end
endmodule

The reference 'x' inside initial block is 'int x;' inside module, not 'bit x' inside generate block.

Now for my earlier example, 'bl' as struct is not yet declared when 'bl.x' is referred, and it must hit generate block 'bl'. So I am not sure how you derive rule <1> will be applied here.

Regards
Surya



-------- Original Message  --------
Subject: Re:[sv-bc] Member select or hierarchical name
From: Bresticker, Shalom <shalom.bresticker@intel.com><mailto:shalom.bresticker@intel.com>
To: Surya Pratik Saha <spsaha@cal.interrasystems.com><mailto:spsaha@cal.interrasystems.com>
Cc: "sv-bc@eda.org"<mailto:sv-bc@eda.org> <sv-bc@eda.org><mailto:sv-bc@eda.org>
Date: Wednesday, January 07, 2009 5:41:54 PM
Hi,

I can see where you get confused. As I wrote, we still have a long way to go before the description is complete, precise, and clear.

In this case, "the first name in the sequence is resolved as though it were a simple identifier"
should point you to 23.9, where it says,
"If an identifier is referenced directly (without a hierarchical path) within a task, function, named block, or generate block, it shall be declared either within the task, function, named block, or generate block locally or within a module, interface, program, checker, task, function, named block, or generate block that is higher in the same branch of the name tree that contains the task, function, named block, or generate block. If it is declared locally, then the local item shall be used; if not, the search shall continue upward until an item by that name is found or until a module, interface, program, or checker boundary is encountered."

As a result bl resolves to the variable declaration. Then rule <1> applies.
Shalom
________________________________
From: Surya Pratik Saha [mailto:spsaha@cal.interrasystems.com]
Sent: Wednesday, January 07, 2009 2:04 PM
To: Bresticker, Shalom
Cc: sv-bc@eda.org<mailto:sv-bc@eda.org>
Subject: Re: [sv-bc] Member select or hierarchical name

Hi Shalom,
Darft LRM mentioned:
When a dotted name is encountered at its point of appearance, the first name in the sequence is resolved as though it were a simple identifier.

And if we go by simple identifier searching rule, then 'b1' to be selected as generate block, as the struct is not yet declared. So the 'bl.x' has to be considered as 'hierarchical name' as per the rule <2> mentioned in the section. So your comment saying "bl.x is considered to be a member select of bl.x." is not correct. But my query is - after traversing the whole design, is it required to double check the 'hierarchical name's to convert to 'member select'. In that way, LRM is silent.

Regards
Surya



-------- Original Message  --------
Subject: Re:[sv-bc] Member select or hierarchical name
From: Bresticker, Shalom <shalom.bresticker@intel.com><mailto:shalom.bresticker@intel.com>
To: Surya Pratik Saha <spsaha@cal.interrasystems.com><mailto:spsaha@cal.interrasystems.com>, sv-bc@eda.org<mailto:sv-bc@eda.org> <sv-bc@eda.org><mailto:sv-bc@eda.org>
Date: Wednesday, January 07, 2009 5:21:31 PM

Hi,

This is actually one of the simpler cases and is connected to sections 23.8 and 23.9 as well.

This whole subject is still far from being adequately described in the LRM, but we try to improve each time.

One of the basic rules is that you look for the first component of the name in the local scope. If you find it, then you go downward from there. If not, then you go upward and try again.

In this case, the first component of bl.x is bl. bl is not declared within the initial procedure, so you go up to the generate block. In this case, bl is declared inside the generate block, as the name of the struct. Then bl.x is considered to be a member select of bl.x.

A more complex case would be if struct bl did not contain a member x. Would it go up to the generate block called bl and the variable int x inside it or would it still consider bl to be a reference to the struct bl and then bl.x would be an error because it does not exist?

This was ambiguous in previous versions of the standard. This revision attempts to resolve that ambiguity. I believe that the rules defined in 23.7 in this draft will define that bl would resolve to the struct in any case and bl.x would be an error.

Regards,
Shalom



-----Original Message-----
From: owner-sv-bc@server.eda.org<mailto:owner-sv-bc@server.eda.org>
[mailto:owner-sv-bc@server.eda.org] On Behalf Of Surya Pratik Saha
Sent: Wednesday, January 07, 2009 1:26 PM
To: sv-bc@eda.org<mailto:sv-bc@eda.org>
Subject: [sv-bc] Member select or hierarchical name

Hi,
I have just gone through the section 23.7 (Member selects and
hierarchical names). The section seems very interesting.
However, I am not sure if a hierarchical name will be
converted to member select or not when the whole scope is
traversed. For e.g.

module top;
    generate
        begin:bl
            int x;
            initial begin
               bl.x = 1; // will it be converted to member
select of struct after the full scope is traversed
            end
             struct {int x;} bl;
       end
    endgenerate
endmodule

Please let me know.
Currently all standard simulators consider 'bl.x' as member select.

--
Regards
Surya

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Received on Wed Jan 7 05:54:33 2009

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